Wiki source code of Tutorial 2 - als

Last modified by Richard Kreissig on 2025/01/30 12:05
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1 == T2A1: Important Thoughts ==
2
3 === Write down the difference between Extended SCCharts and Core SCCharts. ===
4
5 Core SCCharts consist of a minimal set of SCCharts elements on which the semantic of SCCharts is defined.
6
7 Extended SCCharts are conservative extension of the Core SCCharts elements. These Extended features extend the syntax of SCCharts and enlarge the language for better usability.
8
9 Each Extended SSChart can be transformed step-by-step into a semantically equal Core SCChart. Some Transformations translating a single Extended features into Core use other Extended features, resulting dependencies between Extended Transformations.
10
11 === What advantages has the Core SCCharts normalization? ===
12
13 Normalization simplifies the structure of Core SCChart by reducing the variety of allowed structure constructions to a minimal set of five structure pattern.
14
15 This facilitates transformation into other model types especially SCG because normalized SCCharts have the same structure as SCGs. This is due to the appropriate definition of the structure patterns.
16
17 === Describe in own words what a basic block is. ===
18
19 BBs are distinct sets of SCG nodes that can be executed monolithically and continuously in cases of control flow.
20
21 There are no incoming or outgoing control flow edges in a BB or a tick edge.
22
23 Thus a BB can be executes without any control flow switches or jumps.
24
25 === Which constraints influence the ordering of a schedule? ===
26
27 The main constraint is the initialize update read protocol for concurrent but not confluent access of variables.
28
29 As a result there are dependencies between nodes in SCGs which define their ordering constraints in a schedule.
30
31 There are simple "happen before" dependencies cause by sequential control flow.
32
33 Furthermore there are dependencies demanding absolute writes before relative write, relative writes before reads and consequently absolute writes before read.
34
35 A “write / write conflict", both absolute or relative, makes it impossible to find an schedule.
36
37 == T2A2: Tickets ==
38
39 === Created ===
40
41
42
43
44
45 === Resolved ===
46
47
48
49 == T2A3: Modeling with SCCharts ==
50
51 {{code linenumbers="true" collapse="true" title="rail.sct"}}
52 scchart rail {
53 input bool second;
54 input bool contact0 , contact1;
55 output int track;
56 initial state station_controller "station controller" {
57 region go:
58 initial state init
59 --> running immediate with / track = 60;
60
61 state running;
62 region platform:
63 initial state waiting
64 --> slowdown immediate with contact0 / track = 20;
65
66 state slowdown
67 --> stop immediate with contact1 / track = 0;
68
69 state stop
70 --> waiting with 5 second / track = 60;
71
72 };
73 }
74 {{/code}}
75
76 == T2A4: SCCharts Transformations ==
77
78 === Transforming into Core SCChart ===
79
80 1. **Count Delay** (//5 seconds// guard in transition).
81 1*. //5 seconds// becomes //_counter == 5//.
82 1**. Implicit counting becomes explicit check of a counter.
83 1*. Counter control
84 1**. State //station control// gets integer variable //_counter.//
85 1**. State //stop// where counting should happen gets:
86 1***. entry action with //counter = 0// effect to initialize counter each time the state is entered.
87 1***. during action which increments counter each time //second// holds.
88 1. **During** action in stop added in step 1.
89 1*. State //stop// gets boolean variable _//term// initialized to false.
90 1*. State //stop// gets a region with a //Main// ~-~-> _//Term// states were the immediate transition sets _//term// to true. //Main// contains the behavior of //stop// which is empty.
91 1*. State //stop// gets a region with the counter behavior increments _//counter// every tick where second is true or terminates if _//term// is true.
92 1. **Abort** of state //stop//
93 1*. Transition form //stop// to //waiting// becomes normal termination without trigger.
94 1*. State //station controller// gets boolean variable _//trig// initialized to false.
95 1*. State //Main// gets region with states //_Run ~-~-> _Done// with trigger //_counter == 5// of the transformed termination and effect _trig = true
96 1. **Initialization**//_term = false// in state //stop// added in step 2 and //_trig = false// in step 3
97 1*. //_term //and// _trig// become uninitialized.
98 1*. State //stop// gets entry action initializing _//term// with false.
99 1*. State //station controller// gets entry action initializing _//trig// with false.
100 1. **Entry** actions added in step 1 and 4.
101 1*. The internal regions of //stop// are moved into a state //Main// in //stop//.
102 1*. The initial state leads to //Main// via two concatenated immediate transitions connected by a connector. The transitions have their triggers and effects according to the two entry actions they are transformed from. So the entry behavior is executed before entering //Main// and thus as entry action of the state.
103 1*. //Main// has an empty normal termination to the final state in //stop.//
104 1*. The internal regions of //station controller// are moved into a state //Main// in //station controller//.
105 1*. The initial state leads to //Main// via  immediate transitions with effects// _trig = false//
106 1*. //Main// has an empty normal termination to the final state in //station controller//.
107 1. **Connector** added in step 4.
108 1*. The connector is turned into a simple state //_c//.
109
110 After these transformations there are no more Extended features resulting a Core SCChart.
111
112 [[image:attach:rail_core.png]]
113
114 === Normalization ===
115
116
117 [[image:attach:rail_normalized.png]]
118
119 === SCG ===
120
121 The SCG is not schedulable because there is a write/write conflict between the transitions setting variable //track.//
122
123 The initialization of //track// in region //go// is concurrent to the effects of the contact transitions and all three are absolute writes.
124
125 If contact0 is true , and maybe contact1 too, in the first tick there is a conflict between effects~:// track = 60, track = 20, track = 0// which is impossible to schedule in SC MoC.
126
127 [[image:attach:rail_scg_dep.png]]
128
129 == T2A5: Code Generation ==
130
131 The write/write conflict needs to be resolved.
132
133 This is done by moving the go region into the platform regions and initializing track to 60 before entering waiting state.
134
135 Additionally the transformation of Count Delay behavior produces an ASC-unscheldulable SCG (cycle between read/write of _trem and _counter) thus the counter needs to be flatten to a chain of states //sleep_//.
136
137 The resulting SCChart is:
138
139 [[image:attach:rail_2.png]]
140
141 [[image:attach:rail_2.scg.png]]
142
143 Generated C code:
144
145 {{code linenumbers="true" collapse="true" title="Generated C code"}}
146
147 /*****************************************************************************/
148 /* G E N E R A T E D C C O D E */
149 /*****************************************************************************/
150 /* KIELER - Kiel Integrated Environment for Layout Eclipse RichClient */
151 /* */
152 /* http://www.informatik.uni-kiel.de/rtsys/kieler/ */
153 /* Copyright 2014 by */
154 /* + Christian-Albrechts-University of Kiel */
155 /* + Department of Computer Science */
156 /* + Real-Time and Embedded Systems Group */
157 /* */
158 /* This code is provided under the terms of the Eclipse Public License (EPL).*/
159 /*****************************************************************************/
160
161
162
163 int second ;;
164
165 int contact0 ;;
166
167 int contact1 ;;
168
169 int track ;;
170
171 int _GO ;;
172
173 int guard20_e1 ;;
174
175 int guard0 ;;
176
177 int guard1 ;;
178
179 int guard2 ;;
180
181 int guard3 ;;
182
183 int guard4 ;;
184
185 int guard5 ;
186 int PRE_guard5 ;;
187
188 int guard6 ;;
189
190 int guard7 ;
191 int PRE_guard7 ;;
192
193 int guard8 ;;
194
195 int guard9 ;
196 int PRE_guard9 ;;
197
198 int guard10 ;;
199
200 int guard11 ;
201 int PRE_guard11 ;;
202
203 int guard12 ;;
204
205 int guard13 ;
206 int PRE_guard13 ;;
207
208 int guard14 ;;
209
210 int guard15 ;;
211
212 int guard16 ;
213 int PRE_guard16 ;;
214
215 int guard17 ;;
216
217 int guard18 ;
218 int PRE_guard18 ;;
219
220 int guard19 ;;
221
222 int guard20 ;;
223
224 int guard21 ;
225
226
227
228
229
230 int reset(){
231 _GO = 1;
232 }
233
234
235 int tick(){
236 guard0 = _GO;
237 Tick: {
238 if (guard1) {
239 track = 60;
240 }
241 guard14 = (PRE_guard13)
242 ;
243 guard15 = (
244 guard14 &&
245 second
246 )
247 ;
248 if (guard15) {
249 track = 60;
250 }
251 guard2 = (
252 guard1 ||
253 guard15
254 )
255 ;
256 guard19 = (PRE_guard18)
257 ;
258 guard3 = (
259 (
260 guard2 &&
261 contact0
262 ) ||
263 (
264 guard19 &&
265 contact0
266 )
267 )
268 ;
269 if (guard3) {
270 track = 20;
271 }
272 guard17 = (PRE_guard16)
273 ;
274 guard4 = (
275 (
276 guard3 &&
277 contact1
278 ) ||
279 (
280 guard17 &&
281 contact1
282 )
283 )
284 ;
285 if (guard4) {
286 track = 0;
287 }
288 guard6 = (PRE_guard5)
289 ;
290 guard5 = (
291 guard4 ||
292 (
293 guard6 &&
294 (!(second))
295 )
296 )
297 ;
298 guard8 = (PRE_guard7)
299 ;
300 guard7 = (
301 (
302 guard6 &&
303 second
304 ) ||
305 (
306 guard8 &&
307 (!(second))
308 )
309 )
310 ;
311 guard10 = (PRE_guard9)
312 ;
313 guard9 = (
314 (
315 guard8 &&
316 second
317 ) ||
318 (
319 guard10 &&
320 (!(second))
321 )
322 )
323 ;
324 guard12 = (PRE_guard11)
325 ;
326 guard11 = (
327 (
328 guard10 &&
329 second
330 ) ||
331 (
332 guard12 &&
333 (!(second))
334 )
335 )
336 ;
337 guard13 = (
338 (
339 guard12 &&
340 second
341 ) ||
342 (
343 guard14 &&
344 (!(second))
345 )
346 )
347 ;
348 guard16 = (
349 (
350 guard3 &&
351 (!(contact1))
352 ) ||
353 (
354 guard17 &&
355 (!(contact1))
356 )
357 )
358 ;
359 guard18 = (
360 (
361 guard2 &&
362 (!(contact0))
363 ) ||
364 (
365 guard19 &&
366 (!(contact0))
367 )
368 )
369 ;
370 guard20 = 0;
371 guard20_e1 = (!((
372 guard18 ||
373 (
374 guard16 ||
375 (
376 guard5 ||
377 (
378 guard7 ||
379 (
380 guard9 ||
381 (
382 guard11 ||
383 guard13
384 )
385 )
386 )
387 )
388 )
389 )
390 ))
391 ;
392 guard21 = (
393 (
394 guard20_e1 ||
395 guard20
396 ) &&
397 guard20
398 )
399 ;
400 }
401 _GO = 0
402 }
403 {{/code}}
404
405 == T2A6: Hostcode ==
406
407 {{code linenumbers="true" collapse="true" title="SCT"}}
408 scchart rail {
409 input bool second;
410 initial state station_controller "station controller" {
411 initial state init
412 --> waiting immediate with / 'settrack(railway, KH_ST_1, FWD, 60)';
413 state waiting {
414 entry / 'getcontact(railway, KH_ST_1, 0, 1)';//consume last contact event triggered by trains tail
415 }
416 --> slowdown immediate with 'getcontact(railway, KH_ST_1, 0, 1) != NONE' / 'settrack(railway, KH_ST_1, FWD, 20)';
417
418 state slowdown {
419 entry / 'getcontact(railway, KH_ST_1, 1, 1)';//consume last contact event triggered by trains tail
420 }
421 --> stop immediate with 'getcontact(railway, KH_ST_1, 1, 1) != NONE' / 'settrack(railway, KH_ST_1, BRAKE, 0)';
422
423 state stop
424 --> sleep_1 with second;
425
426 state sleep_1
427 --> sleep_2 with second;
428
429 state sleep_2
430 --> sleep_3 with second;
431
432 state sleep_3
433 --> sleep_4 with second;
434
435 state sleep_4
436 --> waiting with second / 'settrack(railway, KH_ST_1, FWD, 60)';
437
438 };
439 }
440 {{/code}}
441
442
443 Hostcode does not work properly.

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