Inf-MP-ES: Masterprojekt Echtzeitsysteme/Eingebettete Systeme (Layout)

Welcome!

Welcome to the Wiki page of the Master project offered by the Real Time and Embedded Systems group on orthogonal layout.

  • We give you some insight about what the project is about.
  • It's the place where we post important information on the project, such as due dates and similar information.
  • And finally, it's the place where each group will document their project.

About the Orthogonal Layout and the Topology Shape Metrics Approach

The topology shape metrics approach follows three steps:

  • Topology: Making sure that the order of edges around a node is good and therefore the topology of the graph is good
    • This should consider potential constraints ports might have and nodes might need, such as the port constraints supported by ELK, since this might be required for visualizing bus routes.
  • Shape: Make sure that we have minimal edge bends, i.e. the drawing has a nice shape
  • Metrics: Assign real coordinates to nodes and routes to edges, e.g. on a grid or following other constraints

Topics for this Master's Project

In this Master's project, we want you to bring your expertise as a computer scientist interested in algorithm engineering or person interested in visualization to tackle the following tasks:

  • Create an algorithm for orthogonal layout using as part of the Eclipse Layout Kernel
  • Visualize all bus routes in Kiel using the orthogonal layout algorithm.

Contact us:

The project is supervised by the following university staff. Please contact us if you have questions regarding the project.

Prof. Dr. Reinhard von Hanxleden (rvh@informatik...)
Maximilian Kasperowski (mka@informatik...)
Sören Domrös (sdo@informatik...)

Important dates:

Kick-Off Meeting: TBD

Examples:

See what yworks has to offer.

https://www.kvg-kiel.de/_img/1sv3tcVFJpIsxvPmvEgpmqbLJuImWp_baRB92fELwFM/fn:web_VRK_TAG_SLNP_Kiel_Dezember2023-1653x432/q:75/rs:fill:1328:352:0:0/czM6Ly9rdmctbmVvcy1lYnVzL25lb3MvcmVzb3VyY2VzL3BlcnNpc3RlbnQvZWM0OGRkY2I1ODIxZTYyMmNjNzU2MmY1YTUyOTc2MTM1ZWZkMjJkOQ

Literature

Metro Line Layout

Port Constraints

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