This section describes the intermediate processors that are available. For a description of what intermediate processors actually are, seeĀ KLay Layered.

Each intermediate processor is described by its required preconditions, its postconditions, the slot where it should be placed in and dependencies to intermediate processors in the same slot. The descriptions are kept very brief, since layout processors are usually well documented. Programmers using layout processors need not worry about dependencies. However, when adding a new processor, dependencies matter. For more information, see the documentation of IntermediateLayoutProcessor.

The following table provides an overview of all available layout processors and the slots they can be placed in. Note that a processor may appear in more than one slot. Within each slot, processors are ordered by theirs dependencies on each other.

 

Slot

Processor

Tested

Before phase 1

Graph Transformer
Comment Preprocessor
Edge And Layer Constraint Edge Reverser


Before phase 2

Big Nodes Processor
Label Dummy Inserter


Before phase 3

Layer Constraint Processor
Hierarchical Port Constraint Processor
Long Edge Splitter
Port Side Processor
Label Dummy Switcher
Inverted Port Processor
Self Loop Processor
Port List Sorter
North South Port Preprocessor








Before phase 4

In Layer Constraint Processor
Hierarchical Port Dummy Size Processor
Hyperedge Dummy Merger
Label Side Selector
Label And Node Size Processor
Node Margin Calculator







Before phase 5

Layer Size and Graph Height Calculator
Hierarchical Port Position Processor


After phase 5

Comment Postprocessor
Hypernode Processor
Hierarchical Port Orthogonal Edge Router
Long Edge Joiner
North South Port Postprocessor
Label Dummy Remover
Reversed Edge Restorer
Graph Transformer
End Label Processor








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