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From version < 34.1 >
edited by ssm
on 2014/09/02 10:27
To version < 32.1 >
edited by cds
on 2014/07/29 08:19
>
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1 -XWiki.ssm
1 +XWiki.cds
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16 16  == Modeling Pragmatics ==
17 17  
18 18  * **Comment Attachment**
19 -When computing a new layout for a diagram that contains comments (comparable to comments in source code), the comments often get placed far away of the nodes they refer to. This is because often the reference is not explicitly encoded in the original model. We have used a distance-based metric in the past to discover references automatically, but there are lots of ideas for improvement. This bachelor thesis would implement them, perhaps come up with additional ideas, and finally evaluate them in a thorough experiment.
19 +When computing a new layout for a diagram that contains comments (comparable to comments in source code), the comments often get placed far away of the nodes they refer to. This is because often the reference is not explicitly encoded in the original model. We have used a distance-based metric in the past to discover references automatically, but there are lots of ideas for improvement. This bachelor thesis would implement them, perhaps come up with additional ideas, and finally evaluate them in a thorough experiment.\\
20 20  * **Control Flow Graph Exploration / Visualization**
21 21  Use pragmatics concepts (automatic layout, focus & context) for exploring/visualizing control flow graphs and specific paths, eg. as computed by OTAWA WCET analysis tool, eg. using Klighd.
22 22  * **OMG DD Format**
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26 26  
27 27  * **Validation Manager for Models**
28 28  Develop an integrated, flexible and generic syntactic validation framework for models (e.g. Esterel or SyncCharts).
29 -* **SCCharts compiler validation with Esterel**
30 -Automate the validation of the SCCharts compiler using the Esterel simulation.
31 -* **Transformation from SCCharts to Esterel** [possibly also Master Topic]
32 -Develop a transformation in Xtend2 to generate Esterel code for SCCharts.
33 -* **Hardware Synthesis from SCCharts to FPGA **[possibly also Master Topic]
34 -Use the circuit-based code generation to produce code for FPGAs
35 -* **Automatic documentation generation **[possibly also Master Topic]
36 -Develop an automatic SCCharts documentation system
37 -* **Optimizations for the SCCharts compiler **[possibly also Master Topic]
38 -Profile the actual SCCharts compiler and apply optimizations
29 +* **Esterel / SyncCharts Validation**
30 +Automate the validation for a (generic) SyncCharts simulator employing the Esterel simulator and the Esterel to SyncCharts transformation.
31 +* **Transformation from SyncCharts to Esterel** [possibly also Master Topic]
32 +Develop a transformation in Xtend2 to generate Esterel code for SyncCharts.
39 39  
40 40  == Miscellaneous Topics ==
41 41  
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61 61  
62 62  == Modeling Pragmatics ==
63 63  
64 -
65 -
66 66  * **Diagram Description Language**
67 67  Developing the concepts and implementation of a diagram description language based on Klighd, with SyncCharts as application example.
68 68  
69 69  == Semantics and Synchronous Languages ==
70 70  
71 -* **Quartz**
63 +* **FPGA Statecharts**
64 +Development of a Statecharts editor, based on .NET, WPF, MS Silverlight. Synthesis onto FPGAs with a data-flow-based intermediate format.
65 +* **[Quartz]**
72 72  Integrate the synchronous Quartz language into KIELER for validation purposes and teaching.
73 -* **Implementation of a priority-based compilation approach**
74 -Implement the SyncCharts priority-based compilation approach into the SCCharts compiler chain.
75 -* **Curing Schizophrenia in SCCharts**
76 -Develop new synchronizer to handle schizophrenia properly (e.g. depth join).
77 -* **Adding dataflow to SCCharts**
78 -Add dataflow to SCCharts
79 -* **Detecting tick boundaries in SCCharts**
80 -Implement an algorithm that detects tick boundaries (in concurrent) threads and therefore improves the scheduling
81 -* **Preserving concurrency for multi-core **
82 -Evaluate possibilities to preserve parallelism in SCCharts**.**
83 -* **Railway 2.0**
84 -Design a new and modern hardware controlling (Version 4) for the railway installation.
Confluence.Code.ConfluencePageClass[0]
Id
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1 -9471794
1 +9471761
URL
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1 -https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/RTSYS/pages/9471794/Topics for Student Theses
1 +https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/RTSYS/pages/9471761/Topics for Student Theses