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From version < 29.1 >
edited by Alexander Schulz-Rosengarten
on 2017/07/24 10:54
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edited by Alexander Schulz-Rosengarten
on 2017/07/26 15:55
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61 -Sun, W.-T.; Salcic, Z.; Malik, A., "LibGALS: a library for GALS systems design and modeling", Proceedings of the 15th Asia South Pacific Design Automation Conference (ASP-DAC)2010:107-112. [[PDF hier>>url:http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05419912||shape="rect" class="external-link"]].
61 +Sun, W.-T.; Salcic, Z.; Malik, A., [[LibGALS: a library for GALS systems design and modeling>>url:http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05419912||shape="rect"]], Proceedings of the 15th Asia South Pacific Design Automation Conference (ASP-DAC)2010:107-112.
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63 63  (% class="bodytext" style="margin-left: 30.0px;" %)
64 -**Lars Viertel:** Magara, A.; Salvaneschi, G., "Ways to react: comparing reactive languages and complex event processing", 1st Workshop on Reactivity, Events and Modularity (REM'13). 2013. [[PDF hier>>url:http://soft.vub.ac.be/REM13/papers/rem20130_submission_5.pdf||shape="rect" class="MIME-application MIME--pdf external-link"]].
64 +**Lars Viertel:** Magara, A.; Salvaneschi, G., [[Ways to react: comparing reactive languages and complex event processing>>url:http://soft.vub.ac.be/REM13/papers/rem20130_submission_5.pdf||shape="rect"]], 1st Workshop on Reactivity, Events and Modularity (REM'13). 2013.
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66 66  (% class="bodytext" style="margin-left: 30.0px;" %)
67 -Gueye, S. M.; De Palma, N.; Rutten, E.; Tchana, A., "Coordinating multiple administration loops using discrete control" (language: Heptagon/BZR), ACM SIGOPS Operating Systems Review, vol. 47, issue 3, December 2013, pp. 18-25. [[PDF hier>>url:http://dl.acm.org/citation.cfm?id=2553074||shape="rect" class="external-link"]].
67 +Gueye, S. M.; De Palma, N.; Rutten, E.; Tchana, A., [[Coordinating multiple administration loops using discrete control>>url:http://dl.acm.org/citation.cfm?id=2553074||shape="rect"]] (language: Heptagon/BZR), ACM SIGOPS Operating Systems Review, vol. 47, issue 3, December 2013, pp. 18-25.
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70 -Attar, P.; Boussinot, F.; Mandel, L.; Susini, J.-F., "Proposal for a Dynamic Synchronous Language", INRIA, Research Proposal, 2011. [[PDF hier>>url:http://hal.archives-ouvertes.fr/docs/00/59/04/20/PDF/dsl.pdf||shape="rect" class="MIME-application MIME--pdf external-link"]].
70 +Talpin, J.-P; Brandt, J.; Gemünde, M.; Schneider, M.; Shukla, S., [[Constructive Polychronous Systems>>url:https://www.irisa.fr/prive/talpin/papers/scp14a.pdf||shape="rect"]], Logical Foundations of Computer Science. vol. 7734, 2013.
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73 -Gamatié, A.; Gonnord, L., "Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systems", Conference on Languages, Compilers and Tools for Embedded Systems (ACM SIGPLAN/SIGBED), LCTES 2011:71-80. [[PDF hier>>url:http://laure.gonnord.org/pro/papers/signal_boolnum_lctes2011.pdf||shape="rect" class="MIME-application MIME--pdf external-link"]].
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76 -Talpin, J.-P; Brandt, J.; Gemünde, M.; Schneider, M.; Shukla, S., "Constructive Polychronous Systems", Logical Foundations of Computer Science. vol. 7734, 2013. [[PDF hier>>url:http://hal.inria.fr/hal-00763371/||shape="rect" class="external-link"]].
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78 78  === Master Empfehlung ===
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90 90  (% class="text-black navigate" %)**Philip Eumann:** Timothy Bourke(%%), (% class="text-black navigate" %)Lélio Brun(%%), (% class="text-black navigate" %)Pierre-Evariste Dagand(%%), (% class="text-black navigate" %)Xavier Leroy(%%), (% class="text-black navigate" %)Marc Pouzet(%%), (% class="text-black navigate" %)Lionel Rieg. (%%)[[(% class="text-black navigate" %)A formally verified compiler for Lustre>>url:http://dl.acm.org/ft_gateway.cfm?id=3062358&ftid=1881521&dwn=1&CFID=781648530&CFTOKEN=67078311||shape="rect"]](%%). In (% class="link-text" %)PLDI 2017(%%), Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation Pages 586-60
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93 -(% class="text-black navigate" %)Gesell, M.; Schneider, K., [[Modular verification of synchronous programs>>url:http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6598342||shape="rect"]], Application of Concurrency to System Design (ACSD), 2013 13th International Conference on, pp. 70, 79, 8-10 Juli 2013
87 +(% class="text-black navigate" %)**Sören Domrös**: Gesell, M.; Schneider, K., [[Modular verification of synchronous programs>>url:http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6598342||shape="rect"]], Application of Concurrency to System Design (ACSD), 2013 13th International Conference on, pp. 70, 79, 8-10 Juli 2013
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96 96  (% class="text-black navigate" %)Shaver, C.; Lee, E.A., [[The coroutine model of computation>>url:http://chess.eecs.berkeley.edu/pubs/902/coroutineModelsWithProof.pdf||shape="rect"]], Proceedings of the 15th international conference on Model Driven Engineering Languages and Systems 2012 (MODELS'12), pp. 319-334. (% class="text-black navigate MIME-application MIME--pdf external-link" %)PDF hier(% class="text-black navigate" %).
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109 109  Brandt, J.; Schneider, K.; [[Passive code in synchronous programs>>url:http://dl.acm.org/citation.cfm?id=2544387||shape="rect"]], ACM Transactions on Embedded Computing Systems (TECS), Special Section, vol. 13 issue 2s, Jan2014, article No. 67.
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106 +Attar, P.; Boussinot, F.; Mandel, L.; Susini, J.-F., [[Proposal for a Dynamic Synchronous Language>>url:http://hal.archives-ouvertes.fr/docs/00/59/04/20/PDF/dsl.pdf||shape="rect"]], INRIA, Research Proposal, 2011.
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108 +(% style="margin-left: 30.0px;" %)
109 +Gamatié, A.; Gonnord, L., [[Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systems>>url:http://laure.gonnord.org/pro/papers/signal_boolnum_lctes2011.pdf||shape="rect"]], Conference on Languages, Compilers and Tools for Embedded Systems (ACM SIGPLAN/SIGBED), LCTES 2011:71-80.
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Id
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1 -28672403
1 +32145469
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1 -https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/SEM/pages/28672403/WS17/18 (Synchrone Sprachen)
1 +https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/SEM/pages/32145469/WS17/18 (Synchrone Sprachen)

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