Last modified by Maximilian Kasperowski on 2025/01/30 12:01
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From version < 61.2 >
edited by Alexander Schulz-Rosengarten
on 2024/02/19 15:31
To version < 68.1 >
edited by Jette Petzold
on 2024/03/06 07:48
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1 +XWiki.jep
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58 58  (% style="margin-left: 30.0px;" %)
59 59  M. C. Werner and K. Schneider, "[[From IEC 61131-3 Function Block Diagrams to Sequentially Constructive Statecharts>>https://ieeexplore.ieee.org/document/9925656]]," //2022 Forum on Specification & Design Languages (FDL)//, Linz, Austria, 2022, pp. 1-8, doi: 10.1109/FDL56239.2022.9925656.
60 60  
61 +(% style="margin-left: 30.0px;" %)
62 +Fabien Siron, Dumitru Potop-Butucaru, Robert De Simone, Damien Chabrol, and Amira Methni. 2023.[[ Semantics foundations of PsyC based on synchronous Logical Execution Time>>https://dl.acm.org/doi/10.1145/3576914.3587495]]. In Proceedings of Cyber-Physical Systems and Internet of Things Week 2023 (CPS-IoT Week '23). Association for Computing Machinery, New York, NY, USA, 319–324. [[https:~~/~~/doi.org/10.1145/3576914.3587495>>https://doi.org/10.1145/3576914.3587495]]
61 61  
62 62  (% style="margin-left: 30.0px;" %)
65 +Alexander Schulz-Rosengarten, Reinhard von Hanxleden, Marten Lohstroh, Edward A. Lee, and Soroush Bateni. 2023. [[Polyglot Modal Models through Lingua Franca>>https://dl.acm.org/doi/abs/10.1145/3576914.3587498]]. In Proceedings of Cyber-Physical Systems and Internet of Things Week 2023 (CPS-IoT Week '23). Association for Computing Machinery, New York, NY, USA, 337–342. [[https:~~/~~/doi.org/10.1145/3576914.3587498>>https://doi.org/10.1145/3576914.3587498]] //(There is also a [[long version>>https://arxiv.org/abs/2301.09597]])//
66 +
67 +
68 +(% style="margin-left: 30.0px;" %)
63 63  ==== **Safety Analysis / Model Checking** ====
64 64  
65 65  (% style="margin-left: 30.0px;" %)
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66 66  (% style="color:#333333" %)J. Axelsson and A. Kobetski, [[Towards a risk analysis method for systems-of-systems based on systems thinking>>url:https://ieeexplore.ieee.org/document/8369501||shape="rect"]]. //2018 Annual IEEE International Systems Conference (SysCon)//, 2018, pp. 1-8, doi: 10.1109/SYSCON.2018.8369501.
67 67  
68 68  (% style="margin-left: 30.0px;" %)
69 -(% style="color:#333333" %)F. G. R. de Souza, J. de Melo Bezerra, C. M. Hirata, P. de Saqui-Sannes and L. Apvrille, [[Combining STPA with SysML Modeling>>url:https://ieeexplore.ieee.org/document/9275867||shape="rect"]]. //2020 IEEE International Systems Conference (SysCon)//, 2020, pp. 1-8, doi: 10.1109/SysCon47679.2020.9275867.
75 +**[assigned]** (% style="color:#333333" %)F. G. R. de Souza, J. de Melo Bezerra, C. M. Hirata, P. de Saqui-Sannes and L. Apvrille, [[Combining STPA with SysML Modeling>>url:https://ieeexplore.ieee.org/document/9275867||shape="rect"]]. //2020 IEEE International Systems Conference (SysCon)//, 2020, pp. 1-8, doi: 10.1109/SysCon47679.2020.9275867.
70 70  
71 71  (% style="margin-left: 30.0px;" %)
72 -J. Kloos, T. Hussain, and R. Eschbach. [[Risk-based testing of safety-critical embedded systems driven by fault tree analysis>>url:https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5954386]]. In //2011 IEEE Fourth International Conference on Software Testing, Verification and Validation Workshops//, pp. 26-33. IEEE, 2011.
78 +**[assigned]** J. Kloos, T. Hussain, and R. Eschbach. [[Risk-based testing of safety-critical embedded systems driven by fault tree analysis>>url:https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5954386]]. In //2011 IEEE Fourth International Conference on Software Testing, Verification and Validation Workshops//, pp. 26-33. IEEE, 2011.
73 73  
74 74  (% style="margin-left: 30.0px;" %)
75 75  L. A. Cortes, P. Eles and Z. Peng, [[Formal coverification of embedded systems using model checking>>url:https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=874622&tag=1]]. //Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future//. Vol. 1. IEEE, 2000.
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96 96  Kenwright, L., Roop, P.S., Allen, N., Lall, S., Cascaval, C., Spalink, T., & Izzard, M. (2024). [[Logical Synchrony Networks: A formal model for deterministic distribution>>https://arxiv.org/abs/2402.07433]]. //ArXiv, abs/2402.07433//.
97 97  
98 98  (% style="margin-left: 30.0px;" %)
99 -Fabien Siron, Dumitru Potop-Butucaru, Robert De Simone, Damien Chabrol, and Amira Methni. 2023.[[ Semantics foundations of PsyC based on synchronous Logical Execution Time>>https://dl.acm.org/doi/10.1145/3576914.3587495]]. In Proceedings of Cyber-Physical Systems and Internet of Things Week 2023 (CPS-IoT Week '23). Association for Computing Machinery, New York, NY, USA, 319–324. https:~/~/doi.org/10.1145/3576914.3587495
105 +K. Didier, A. Cohen, D. Potop-Butucaru and A. Gauffriau, "[[Sheep in wolf's Clothing: Implementation Models for Dataflow Multi-Threaded Software>>https://ieeexplore.ieee.org/document/8843684]]," //2019 19th International Conference on Application of Concurrency to System Design (ACSD)//, Aachen, Germany, 2019, pp. 43-52, doi: 10.1109/ACSD.2019.00009.
100 100  
107 +(% style="margin-left: 30.0px;" %)
108 +Timothy Bourke, Vincent Bregeon, and Marc Pouzet. [[Scheduling and Compiling Rate-Synchronous Programs with End-To-End Latency Constraints>>https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.1]]. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 1:1-1:22, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2023) [[https:~~/~~/doi.org/10.4230/LIPIcs.ECRTS.2023.1>>url:https://doi.org/10.4230/LIPIcs.ECRTS.2023.1]]
101 101  
102 102  (% style="margin-left: 30.0px;" %)
111 +Pascal Fradet, Alain Girault, and Alexandre Honorat. 2023. [[Sequential Scheduling of Dataflow Graphs for Memory Peak Minimization>>https://dl.acm.org/doi/10.1145/3589610.3596280]]. In Proceedings of the 24th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2023). Association for Computing Machinery, New York, NY, USA, 76–86. [[https:~~/~~/doi.org/10.1145/3589610.3596280>>https://doi.org/10.1145/3589610.3596280]]
112 +
113 +(% style="margin-left: 30.0px;" %)
114 +Shaokai Lin, Yatin A. Manerkar, Marten Lohstroh, Elizabeth Polgreen, Sheng-Jung Yu, Chadlia Jerad, Edward A. Lee, and Sanjit A. Seshia. 2023. [[Towards Building Verifiable CPS using Lingua Franca>>https://dl.acm.org/doi/10.1145/3609134]]. ACM Trans. Embed. Comput. Syst. 22, 5s, Article 155 (October 2023), 24 pages. [[https:~~/~~/doi.org/10.1145/3609134>>https://doi.org/10.1145/3609134]]
115 +
116 +(% style="margin-left: 30.0px;" %)
117 +Christian Menard, Marten Lohstroh, Soroush Bateni, Matthew Chorlian, Arthur Deng, Peter Donovan, Clément Fournier, Shaokai Lin, Felix Suchert, Tassilo Tanneberger, Hokeun Kim, Jeronimo Castrillon, and Edward A. Lee. 2023. [[High-performance Deterministic Concurrency Using Lingua Franca.>>https://dl.acm.org/doi/10.1145/3617687]] ACM Trans. Archit. Code Optim. 20, 4, Article 48 (December 2023), 29 pages. [[https:~~/~~/doi.org/10.1145/3617687>>https://doi.org/10.1145/3617687]]
118 +
119 +
120 +(% style="margin-left: 30.0px;" %)
103 103  ==== **Safety Analysis / Testing** ====
104 104  
105 105  (% style="margin-left: 30.0px;" %)
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108 108  (% style="margin-left: 30.0px;" %)
109 109  (% style="color:#333333" %)A. Gannous, A. Andrews and B. Gallina, [[Toward a Systematic and Safety Evidence Productive Verification Approach for Safety-Critical Systems>>url:https://ieeexplore.ieee.org/document/8539215||shape="rect"]]. (%%)//2018 IEEE International Symposium on Software Reliability Engineering Workshops (ISSREW)//(% style="color:#333333" %), 2018, pp. 329-336, doi: 10.1109/ISSREW.2018.00026.
110 110  
129 +
111 111  = Schedule =
112 112  
113 113  == Dates in the semester ==
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119 119  Milestone
120 120  )))
121 121  |(((
122 -Tue. 16.04 10:00 CAP4 R.1115
141 +Tue., 16.04 10:00
123 123  )))|(((
124 -First Meeting/**Kick-Off **with a Latex and EasyChair introduction.
143 +First Meeting/**Kick-Off **with a Latex and EasyChair introduction. The meeting will take place in room 11.1114/11.1115 in CAP4.
125 125  )))
126 -|(% colspan="1" %)tbd|(% colspan="1" %)(% colspan="1" %)
145 +|(% colspan="1" %)Tue., 16.04 23:59|(% colspan="1" %)(% colspan="1" %)
127 127  (((
128 128  Deadline for topic selection (via email to Jette).
129 129  )))
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175 175  )))
176 176  |(% colspan="1" %)(% colspan="1" %)
177 177  (((
178 -tbd, all day
197 +Mo., 15.07, all day^^1^^
179 179  )))|(% colspan="1" %)(% colspan="1" %)
180 180  (((
181 181  Final presentations
182 182  )))
183 183  
203 +(% class="wikigeneratedid" %)
204 +//^^1^^preliminary date; please contact us if there are any conflicts with exams//
205 +
184 184  == The Final Presentations ==
185 185  
186 186  The presentation of the prepared topic is held during a block seminar at **tbd**. The attendance at the seminar day is mandatory. Every attending person receives the proceedings of the current semester.

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