Changes for page 2024 Synchronous Languages
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... ... @@ -55,23 +55,36 @@ 55 55 (% style="margin-left: 30.0px;" %) 56 56 (% style="color:#333333" %)L. Grimm, S. Smyth, A. Schulz-Rosengarten, R. von Hanxleden and M. Pouzet, [[From Lustre to Graphical Models and SCCharts>>url:https://ieeexplore.ieee.org/document/9232944||shape="rect"]], //2020 Forum for Specification and Design Languages (FDL)//, 2020, pp. 1-8, doi: 10.1109/FDL50818.2020.9232944. 57 57 58 +(% style="margin-left: 30.0px;" %) 59 +(% style="color:#003366" %)**[assigned] **(% style="color:#333333" %)Joaquin Aguado and Alejandra Duenas, [[Synchronised Shared Memory and Model Checking: A Proof of Concept>>url:https://ieeexplore.ieee.org/abstract/document/9568373||shape="rect"]], //2021 Forum on specification & Design Languages (FDL)//, 2021, pp. 01-08 58 58 59 59 (% style="margin-left: 30.0px;" %) 60 -==== ** Safety Analysis/Model Checking** ====62 +==== **Real-Time / Embedded** ==== 61 61 62 62 (% style="margin-left: 30.0px;" %) 63 - (%style="color:#333333" %)J. Axelsson andA.Kobetski, [[Towardsa riskanalysismethodfor systems-of-systemsbasedon systemsthinking>>url:https://ieeexplore.ieee.org/document/8369501||shape="rect"]].//2018AnnualIEEEInternationalSystemsConference(SysCon)//,2018, pp. 1-8, doi:10.1109/SYSCON.2018.8369501.65 +Saranya Natarajan and David Broman, [[Temporal Property-Based Testing of a Timed C Compiler using Time-Flow Graph Semantics>>url:https://ieeexplore.ieee.org/document/9232935||shape="rect"]], //2020 Forum for Specification and Design Languages (FDL)//(% style="color:#333333" %), 2020 64 64 65 65 (% style="margin-left: 30.0px;" %) 66 - (%style="color:#333333"%)F. G. R. deSouza,J. de MeloBezerra, C. M. Hirata,P. deSaqui-Sannes andL.Apvrille,[[CombiningSTPA with SysML Modeling>>url:https://ieeexplore.ieee.org/document/9275867||shape="rect"]]. //2020IEEEInternationalSystemsConference(SysCon)//, 2020, pp.1-8, doi:10.1109/SysCon47679.2020.9275867.68 +Francisco Sant'Anna, Rodrigo Santos, and Noemi Rodriguez. 2021. [[Symmetric distributed applications>>url:https://dl.acm.org/doi/10.1145/3486605.3486786||shape="rect"]]. //Proceedings of the 8th ACM SIGPLAN International Workshop on Reactive and Event-Based Languages and Systems//. Association for Computing Machinery. 67 67 68 68 (% style="margin-left: 30.0px;" %) 69 - J.Kloos, T. Hussain, and R. Eschbach. [[Risk-based testing ofsafety-criticalembedded systems drivenby fault tree analysis>>url:https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5954386]]. In //2011IEEE Fourth International Conference on Software Testing, Verification and Validation Workshops//, pp. 26-33. IEEE, 2011.71 +==== **Safety Analysis** ==== 70 70 71 71 (% style="margin-left: 30.0px;" %) 72 - L.A. Cortes,P.ElesandZ.Peng,[[Formalcoverification of embedded systems usingmodelchecking>>url:https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=874622&tag=1]].//Proceedingsof the 26thEuromicro Conference. EUROMICRO 2000. Informatics: Inventingthe Future//.Vol.1.IEEE,2000.74 +(% style="color:#222222" %)Sven Stefan Krauss, Martin Rejzek, and Christian Hilbes. [[Tool Qualification Considerations for Tools Supporting STPA>>url:https://www.sciencedirect.com/science/article/pii/S1877705815038606||shape="rect"]]. (% style="text-align:left" %)//Procedia Engineering//(% style="color:#222222" %) 128 (2015): 15-24. 73 73 76 +(% style="margin-left: 30.0px;" %) 77 +(% style="color:#333333" %)H. Reza, M. Pimple, V. Krishna and J. Hildle, [[A Safety Analysis Method Using Fault Tree Analysis and Petri Nets>>url:https://ieeexplore.ieee.org/document/5070769||shape="rect"]]. (% style="color:#222222" %)//2009 Sixth International Conference on Information Technology: New Generations//(% style="color:#333333" %), 2009, pp. 1089-1094, doi: 10.1109/ITNG.2009.183. 74 74 79 +(% style="margin-left: 30.0px;" %) 80 +(% style="color:#333333" %)J. Axelsson and A. Kobetski, [[Towards a risk analysis method for systems-of-systems based on systems thinking>>url:https://ieeexplore.ieee.org/document/8369501||shape="rect"]]. //2018 Annual IEEE International Systems Conference (SysCon)//, 2018, pp. 1-8, doi: 10.1109/SYSCON.2018.8369501. 81 + 82 +(% style="margin-left: 30.0px;" %) 83 +(% style="color:#333333" %)F. G. R. de Souza, J. de Melo Bezerra, C. M. Hirata, P. de Saqui-Sannes and L. Apvrille, [[Combining STPA with SysML Modeling>>url:https://ieeexplore.ieee.org/document/9275867||shape="rect"]]. //2020 IEEE International Systems Conference (SysCon)//, 2020, pp. 1-8, doi: 10.1109/SysCon47679.2020.9275867. 84 + 85 +(% style="margin-left: 30.0px;" %) 86 +(% style="color:#333333" %)D. L. Gurgel, C. M. Hirata and J. De M. Bezerra, [[A rule-based approach for safety analysis using STAMP/STPA>>url:https://ieeexplore.ieee.org/document/7311464||shape="rect"]]. //2015 IEEE/AIAA 34th Digital Avionics Systems Conference (DASC)//, 2015, pp. 7B2-1-7B2-8, doi: 10.1109/DASC.2015.7311464. 87 + 75 75 === Master Recommendations === 76 76 77 77 (% style="margin-left: 30.0px;" %)