Changes for page Basic design
Last modified by nfl on 2025/01/30 12:05
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... ... @@ -43,148 +43,6 @@ 43 43 44 44 The train controller is composed of several //Station-2-Station// controllers. These are combined to form a complete schedule. Additionally, the cleanup signal has to be watched to abort the schedule and return back to the initial position. 45 45 46 -=== Structure === 47 - 48 -{{code linenumbers="true" language="sct"}} 49 -scchart Test2b "Test of IC_JCT" { 50 - bool IC_JCT_0_req[11], IC_LN_0_req[11], IC_LN_1_req[11], IC_LN_2_req[11]; 51 - bool IC_LN_3_req[11], IC_LN_4_req[11], IC_LN_5_req[11], IC_ST_0_req[11]; 52 - bool IC_ST_1_req[11], IC_ST_2_req[11], IC_ST_3_req[11], IC_ST_4_req[11]; 53 - bool IO_LN_0_req[11], IO_LN_1_req[11], IO_LN_2_req[11], KH_LN_0_req[11]; 54 - bool KH_LN_1_req[11], KH_LN_2_req[11], KH_LN_3_req[11], KH_LN_4_req[11]; 55 - bool KH_LN_5_req[11], KH_LN_6_req[11], KH_LN_7_req[11], KH_LN_8_req[11]; 56 - bool KH_ST_0_req[11], KH_ST_1_req[11], KH_ST_2_req[11], KH_ST_3_req[11]; 57 - bool KH_ST_4_req[11], KH_ST_5_req[11], KH_ST_6_req[11], KIO_LN_0_req[11]; 58 - bool KIO_LN_1_req[11], OC_JCT_0_req[11], OC_LN_0_req[11], OC_LN_1_req[11]; 59 - bool OC_LN_2_req[11], OC_LN_3_req[11], OC_LN_4_req[11], OC_LN_5_req[11]; 60 - bool OC_ST_0_req[11], OC_ST_1_req[11], OC_ST_2_req[11], OC_ST_3_req[11]; 61 - bool OC_ST_4_req[11], OI_LN_0_req[11], OI_LN_1_req[11], OI_LN_2_req[11]; 62 - bool req_in_R, req_out_R, req_in_L, req_out_L, perm_in_R, perm_out_R, perm_in_L, perm_out_L; 63 - int IC_JCT_0_perm, IC_LN_0_perm, IC_LN_1_perm, IC_LN_2_perm; 64 - int IC_LN_3_perm, IC_LN_4_perm, IC_LN_5_perm, IC_ST_0_perm; 65 - int IC_ST_1_perm, IC_ST_2_perm, IC_ST_3_perm, IC_ST_4_perm; 66 - int IO_LN_0_perm, IO_LN_1_perm, IO_LN_2_perm, KH_LN_0_perm; 67 - int KH_LN_1_perm, KH_LN_2_perm, KH_LN_3_perm, KH_LN_4_perm; 68 - int KH_LN_5_perm, KH_LN_6_perm, KH_LN_7_perm, KH_LN_8_perm; 69 - int KH_ST_0_perm, KH_ST_1_perm, KH_ST_2_perm, KH_ST_3_perm; 70 - int KH_ST_4_perm, KH_ST_5_perm, KH_ST_6_perm, KIO_LN_0_perm; 71 - int KIO_LN_1_perm, OC_JCT_0_perm, OC_LN_0_perm, OC_LN_1_perm; 72 - int OC_LN_2_perm, OC_LN_3_perm, OC_LN_4_perm, OC_LN_5_perm; 73 - int OC_ST_0_perm, OC_ST_1_perm, OC_ST_2_perm, OC_ST_3_perm; 74 - int OC_ST_4_perm, OI_LN_0_perm, OI_LN_1_perm, OI_LN_2_perm; 75 - 76 - bool debug = false; 77 - bool cleanup = false; 78 - int trainCount; 79 - 80 - const int c_EINS = 1; 81 - const int c_ZWEI = 2; 82 - const int c_DREI = 3; 83 - const int c_VIER = 4; 84 - const int c_FUENF = 5; 85 - 86 - initial state init references initRailway11Trains 87 - --> run; 88 - 89 - state run { 90 - region Mutexes: 91 - initial state Mutexes references mutexRailway11Trains; 92 - 93 - region KH_Mutexes: 94 - initial state KH_Mutexes references kh_mutex; 95 - 96 - region Train4 : 97 - initial state train4 { 98 - 99 - @alterHostcode 100 - const int trainNum = 4; 101 - int arrivalTrack = 3; 102 - 103 - initial state Round references ICIC 104 - bind depTrack to arrivalTrack, 105 - destTrack to c_DREI, 106 - arrTrack to arrivalTrack 107 - >-> Choice; 108 - 109 - state Choice 110 - --> Round with !cleanup | !(arrivalTrack == 3) 111 - --> Done; 112 - 113 - final state Done; 114 - 115 - }; 116 - region Train5 : 117 - initial state train5 { 118 - 119 - @alterHostcode 120 - const int trainNum = 5; 121 - int arrivalTrack = 2; 122 - 123 - initial state Round references ICIC 124 - bind depTrack to arrivalTrack, 125 - destTrack to c_ZWEI, 126 - arrTrack to arrivalTrack 127 - >-> Choice; 128 - 129 - state Choice 130 - --> Round with !cleanup | !(arrivalTrack == 2) 131 - --> Done; 132 - 133 - final state Done; 134 - 135 - }; 136 - 137 - region Train9 : 138 - initial state train9 { 139 - 140 - @alterHostcode 141 - const int trainNum = 9; 142 - int arrivalTrack = 1; 143 - 144 - initial state Round references ICIC 145 - bind depTrack to arrivalTrack, 146 - destTrack to c_EINS, 147 - arrTrack to arrivalTrack 148 - >-> Choice; 149 - 150 - state Choice 151 - --> Round with !cleanup | !(arrivalTrack == 1) 152 - --> Done; 153 - 154 - final state Done; 155 - }; 156 - 157 - region Train7 : 158 - initial state train7 { 159 - 160 - @alterHostcode 161 - const int trainNum = 7; 162 - int arrivalTrack = 1; 163 - 164 - initial state OCtoIC references OCIC 165 - bind depTrack to arrivalTrack, 166 - destTrack to c_ZWEI, 167 - arrTrack to arrivalTrack 168 - >-> ICtoOC; 169 - 170 - state ICtoOC references ICOC 171 - bind depTrack to arrivalTrack, 172 - destTrack to c_EINS, 173 - arrTrack to arrivalTrack 174 - >-> Choice; 175 - 176 - state Choice 177 - --> OCtoIC with !cleanup | !(arrivalTrack == 1) 178 - --> Done; 179 - 180 - final state Done; 181 - }; 182 - }; 183 -} 184 -{{/code}} 185 - 186 - 187 - 188 188 == Station-2-Station controller == 189 189 190 190 Each Station-2-Station controller realizes the movement from one of the stations (IC,OC,KH) to another station. All controllers using IC or OC parts have to respect the traveling directions. For the Kicking Horse Pass two separate controllers, forwards and backwards, are used.
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... ... @@ -1,1 +1,1 @@ 1 -947166 61 +9471664 - URL
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... ... @@ -1,1 +1,1 @@ 1 -https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/SS14Railway/pages/947166 6/Basic design1 +https://rtsys.informatik.uni-kiel.de/confluence//wiki/spaces/SS14Railway/pages/9471664/Basic design